ESL 2.0 Technology Release for the Design of Processor- and Software-Intensive Electronic Platforms
Portable Design News, Friday November 09, 2007
CoWare has announced the first product release supporting companies in their transition from the “proof-of-concept ESL era” to ESL 2.0. ESL 2.0 refers to a second generation of ESL solutions, which aim to facilitate the design and development of processor-centric, software-intensive products with complex interconnect and memory architectures, in a production environment.
Virtual hardware platforms are at the core of ESL 2.0, which is characterized by the combination of the application of ESL technologies and methodologies to a larger community of users including architect and hardware development teams (at the origin of ESL), and now extended to software development, system integration, and test teams; the rapid rollout and use of these technologies and methodologies in a production environment; and the use of virtual hardware platforms by the larger enterprise and its ecosystem through marketing and business development functions.
CoWare is releasing six updated, integrated ESL solutions: Platform Architecture Design, Software Development, Platform Verification, Application Sub-System Design, Processor Design, and DSP Algorithm Design.
The new release delivers the required capabilities for a production use environment. First, through improved modeling productivity, including 50 percent improvement in user ramp-up time required for the larger production teams through design starter kits; 10x productivity improvement for the modeling of multicore platforms through SystemC Component Wizard with automatic test bench creation; Bus Library Wizard for fast and easy interconnect set up; Easy Connect for automatic resolution of point to point links; an intuitive environment for library management, block diagram editing and platform configuration; and expanded IP model library including new processor, interconnect, and peripheral IP models and a new Long-Term-Evolution (LTE) wireless library for DSP algorithm design.
Second, through improvements focused on design task productivity and quality of design including: Up to 200 percent platform simulation performance improvement and 400 percent standalone Instruction Set Simulator (ISS) performance improvement; easier and faster debug and analysis, through powerful new capabilities including the new SystemC Explorer platform debugger and the enhanced Virtual Platform Analyzer: simulation restart, memory map view, and software analysis; finally 50 percent power consumption reduction and 30 percent performance improvement with new processor design features.
The new CoWare ESL 2.0 solution is available now from CoWare. Pricing varies depending on the solution configuration required by the customer.
CoWare, Inc., San Jose, CA (408) 436-4720 [www.coware.com]
