Custom Platform Combines Full-Chip, Mixed-Signal, Analysis and Verification for IC Design

Portable Design News, Thursday March 06, 2008

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Magma Design Automation Inc. has announced immediate availability of Titan, the first full-chip mixed-signal design, analysis and verification platform. Unlike other custom design solutions, Titan tightly integrates custom/analog implementation with digital implementation, circuit simulation, transistor-level extraction and verification – providing a quantum leap in efficiency and productivity for analog designers.

Because Titan is based on Magma’s unified data model, it works seamlessly with Magma’s Talus digital IC implementation, FineSim Pro circuit simulation, Quartz RC transistor-level extraction and Quartz DRC and Quartz LVS physical verification products. As a result, analog and digital design teams are no longer isolated and can have clear visibility into their counterparts’ design space.

In traditional flows, chip finishing – the point at which the digital and analog blocks of a design are placed and routed together – is a time-consuming and manual task. Titan Chip Finishing, the first product to be released on this platform, provides complete and automated chip finishing capabilities. This fast, high-capacity system integrates custom layout with the Talus place-and-route capabilities. It can manipulate the largest designs with ease, automates analog and special net routing through an efficient constraints-based approach and makes all custom layout changes immediately available for physical and timing verification sign-off analysis through a live interface with Talus, Quartz DRC and Quartz LVS. Titan Chip Finishing can implement late engineering change orders (ECOs) that affect both analog and standard-cell components without significantly delaying the schedule.

Titan offers an integrated simulation environment using Magma’s circuit simulator, FineSim, along with QuickCap for parasitic extraction. The FineSim interface also allows for full-chip circuit simulation, offering SPICE-level accuracy for the analog portions of the design and fast SPICE-level accuracy for the digital portions of the design. This ensures that the analog/digital interfaces are well simulated and verified before committing the chip to silicon.

Magma Design Automation, Inc., Santa Clara, CA (408) 565-7500 [www.magma-da.com]